Enable tailrec lower

This commit is contained in:
Mikhael Bogdanov
2017-06-01 14:12:22 +02:00
parent 84e960b3a4
commit 5032064bf0
2 changed files with 18 additions and 2 deletions
@@ -20,6 +20,7 @@ import org.jetbrains.kotlin.backend.common.lower.KCallableNamePropertyLowering
import org.jetbrains.kotlin.backend.common.lower.LateinitLowering
import org.jetbrains.kotlin.backend.common.lower.LocalFunctionsLowering
import org.jetbrains.kotlin.backend.common.lower.SharedVariablesLowering
import org.jetbrains.kotlin.backend.common.lower.TailrecLowering
import org.jetbrains.kotlin.backend.common.runOnFilePostfix
import org.jetbrains.kotlin.backend.jvm.lower.*
import org.jetbrains.kotlin.ir.declarations.IrFile
@@ -44,5 +45,7 @@ class JvmLower(val context: JvmBackendContext) {
SingletonReferencesLowering(context).runOnFilePostfix(irFile)
SyntheticAccessorLowering(context.state).lower(irFile)
BridgeLowering(context.state).runOnFilePostfix(irFile)
TailrecLowering(context).runOnFilePostfix(irFile)
}
}
@@ -605,8 +605,21 @@ class ExpressionCodegen(
val continueLabel = markNewLabel()
val endLabel = Label()
val condition = loop.condition
gen(condition, data)
BranchedValue.condJump(StackValue.onStack(condition.asmType), endLabel, true, mv)
// Avoid true condition generation for tailrec
// ASM and Java verifier assumes that L1 is reachable that cause several verification to fail,
// to avoid them trivial jump elumination is required
// L0
// ICONST_1 //could be eliminated
// IFEQ L1 //could be eliminated
// .... // no jumps
// GOTO L0
// L1
//TODO: write elimination lower
if (!(condition is IrConst<*> && condition.value == true)) {
gen(condition, data)
BranchedValue.condJump(StackValue.onStack(condition.asmType), endLabel, true, mv)
}
with(LoopInfo(loop, continueLabel, endLabel)) {
data.addInfo(this)