From 5032064bf042a53515d983f21ccaac7f67e80918 Mon Sep 17 00:00:00 2001
From: Mikhael Bogdanov <mikhael.bogdanov@jetbrains.com>
Date: Thu, 1 Jun 2017 14:12:22 +0200
Subject: [PATCH] Enable tailrec lower

---
 .../jetbrains/kotlin/backend/jvm/JvmLower.kt    |  3 +++
 .../backend/jvm/codegen/ExpressionCodegen.kt    | 17 +++++++++++++++--
 2 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/compiler/ir/backend.jvm/src/org/jetbrains/kotlin/backend/jvm/JvmLower.kt b/compiler/ir/backend.jvm/src/org/jetbrains/kotlin/backend/jvm/JvmLower.kt
index 32d291db446..2c919b6fb0d 100644
--- a/compiler/ir/backend.jvm/src/org/jetbrains/kotlin/backend/jvm/JvmLower.kt
+++ b/compiler/ir/backend.jvm/src/org/jetbrains/kotlin/backend/jvm/JvmLower.kt
@@ -20,6 +20,7 @@ import org.jetbrains.kotlin.backend.common.lower.KCallableNamePropertyLowering
 import org.jetbrains.kotlin.backend.common.lower.LateinitLowering
 import org.jetbrains.kotlin.backend.common.lower.LocalFunctionsLowering
 import org.jetbrains.kotlin.backend.common.lower.SharedVariablesLowering
+import org.jetbrains.kotlin.backend.common.lower.TailrecLowering
 import org.jetbrains.kotlin.backend.common.runOnFilePostfix
 import org.jetbrains.kotlin.backend.jvm.lower.*
 import org.jetbrains.kotlin.ir.declarations.IrFile
@@ -44,5 +45,7 @@ class JvmLower(val context: JvmBackendContext) {
         SingletonReferencesLowering(context).runOnFilePostfix(irFile)
         SyntheticAccessorLowering(context.state).lower(irFile)
         BridgeLowering(context.state).runOnFilePostfix(irFile)
+
+        TailrecLowering(context).runOnFilePostfix(irFile)
     }
 }
\ No newline at end of file
diff --git a/compiler/ir/backend.jvm/src/org/jetbrains/kotlin/backend/jvm/codegen/ExpressionCodegen.kt b/compiler/ir/backend.jvm/src/org/jetbrains/kotlin/backend/jvm/codegen/ExpressionCodegen.kt
index 3e841660a78..7ede56ea880 100644
--- a/compiler/ir/backend.jvm/src/org/jetbrains/kotlin/backend/jvm/codegen/ExpressionCodegen.kt
+++ b/compiler/ir/backend.jvm/src/org/jetbrains/kotlin/backend/jvm/codegen/ExpressionCodegen.kt
@@ -605,8 +605,21 @@ class ExpressionCodegen(
         val continueLabel = markNewLabel()
         val endLabel = Label()
         val condition = loop.condition
-        gen(condition, data)
-        BranchedValue.condJump(StackValue.onStack(condition.asmType), endLabel, true, mv)
+
+        // Avoid true condition generation for tailrec
+        // ASM and Java verifier assumes that L1 is reachable that cause several verification to fail,
+        // to avoid them trivial jump elumination is required
+        // L0
+        // ICONST_1 //could be eliminated
+        // IFEQ L1 //could be eliminated
+        // .... // no jumps
+        // GOTO L0
+        // L1
+        //TODO: write elimination lower
+        if (!(condition is IrConst<*> && condition.value == true)) {
+            gen(condition, data)
+            BranchedValue.condJump(StackValue.onStack(condition.asmType), endLabel, true, mv)
+        }
 
         with(LoopInfo(loop, continueLabel, endLabel)) {
             data.addInfo(this)