Fix MIPS atomics.
This commit is contained in:
committed by
Pavel Punegov
parent
96b0d10746
commit
d50c16456e
@@ -58,7 +58,21 @@ KLong Kotlin_AtomicLong_addAndGet(KRef thiz, KLong delta) {
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}
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}
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KLong Kotlin_AtomicLong_compareAndSwap(KRef thiz, KLong expectedValue, KLong newValue) {
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KLong Kotlin_AtomicLong_compareAndSwap(KRef thiz, KLong expectedValue, KLong newValue) {
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#ifdef __mips
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// Potentially huge performance penalty, but correct.
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// TODO: reconsider, once target MIPS can do proper 64-bit CAS.
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static int lock = 0;
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while (compareAndSwap(&lock, 0, 1) != 0);
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KLong* address = reinterpret_cast<KLong*>(thiz + 1);
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KLong old = *address;
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if (old == expectedValue) {
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*address = newValue;
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}
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compareAndSwap(&lock, 1, 0);
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return old;
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#else
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return compareAndSwapImpl(thiz, expectedValue, newValue);
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return compareAndSwapImpl(thiz, expectedValue, newValue);
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#endif
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}
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}
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KNativePtr Kotlin_AtomicNativePtr_compareAndSwap(KRef thiz, KNativePtr expectedValue, KNativePtr newValue) {
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KNativePtr Kotlin_AtomicNativePtr_compareAndSwap(KRef thiz, KNativePtr expectedValue, KNativePtr newValue) {
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@@ -87,4 +101,4 @@ OBJ_GETTER(Kotlin_AtomicReference_get, KRef thiz) {
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RETURN_RESULT_OF(ReadRefLocked, &ref->value_, &ref->lock_);
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RETURN_RESULT_OF(ReadRefLocked, &ref->value_, &ref->lock_);
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}
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}
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} // extern "C"
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} // extern "C"
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