adolphenom
97 lines
4.7 KiB
Java
97 lines
4.7 KiB
Java
package mars.simulator;
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import mars.mips.hardware.*;
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import mars.mips.instructions.*;
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import mars.util.*;
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/*
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Copyright (c) 2003-2006, Pete Sanderson and Kenneth Vollmar
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Developed by Pete Sanderson (psanderson@otterbein.edu)
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and Kenneth Vollmar (kenvollmar@missouristate.edu)
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject
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to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR
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ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
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CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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(MIT license, http://www.opensource.org/licenses/mit-license.html)
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*/
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/**
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* Represents an error/interrupt that occurs during execution (simulation).
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* @author Pete Sanderson
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* @version August 2005
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**/
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public class Exceptions {
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/** The exception number is stored in coprocessor 0 cause register ($13)
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* Note: the codes for External Interrupts have been modified from MIPS
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* specs in order to encode two pieces of information. According
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* to spec, there is one External Interrupt code, 0. But then
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* how to distinguish keyboard interrupt from display interrupt?
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* The Cause register has Interupt Pending bits that can be set.
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* Bit 8 represents keyboard, bit 9 represents display. Those
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* bits are included into this code, but shifted right two positions
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* since the interrupt code will be shifted left two positions
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* for inserting cause code into bit positions 2-6 in Cause register.
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* DPS 23 July 2008.
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*/
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public static final int EXTERNAL_INTERRUPT_KEYBOARD = 0x00000040; // see comment above.
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public static final int EXTERNAL_INTERRUPT_DISPLAY = 0x00000080; // see comment above.
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public static final int ADDRESS_EXCEPTION_LOAD = 4;
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public static final int ADDRESS_EXCEPTION_STORE = 5;
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public static final int SYSCALL_EXCEPTION = 8;
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public static final int BREAKPOINT_EXCEPTION = 9;
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public static final int RESERVED_INSTRUCTION_EXCEPTION = 10;
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public static final int ARITHMETIC_OVERFLOW_EXCEPTION = 12;
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public static final int TRAP_EXCEPTION = 13;
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/* the following are from SPIM */
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public static final int DIVIDE_BY_ZERO_EXCEPTION = 15;
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public static final int FLOATING_POINT_OVERFLOW = 16;
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public static final int FLOATING_POINT_UNDERFLOW = 17;
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/**
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* Given MIPS exception cause code, will place that code into
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* coprocessor 0 CAUSE register ($13), set the EPC register to
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* "current" program counter, and set Exception Level bit in STATUS register.
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*
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* @param cause The cause code (see Exceptions for a list)
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*/
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public static void setRegisters(int cause) {
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// Set CAUSE register bits 2 thru 6 to cause value. The "& 0xFFFFFC83" will set bits 2-6 and 8-9 to 0 while
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// keeping all the others. Left-shift by 2 to put cause value into position then OR it in. Bits 8-9 used to
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// identify devices for External Interrupt (8=keyboard,9=display).
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Coprocessor0.updateRegister(Coprocessor0.CAUSE,(Coprocessor0.getValue(Coprocessor0.CAUSE) & 0xFFFFFC83 | (cause << 2)));
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// When exception occurred, PC had already been incremented so need to subtract 4 here.
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Coprocessor0.updateRegister(Coprocessor0.EPC, RegisterFile.getProgramCounter()-Instruction.INSTRUCTION_LENGTH);
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// Set EXL (Exception Level) bit, bit position 1, in STATUS register to 1.
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Coprocessor0.updateRegister(Coprocessor0.STATUS, Binary.setBit(Coprocessor0.getValue(Coprocessor0.STATUS), Coprocessor0.EXCEPTION_LEVEL));
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}
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/**
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* Given MIPS exception cause code and bad address, place the bad address into VADDR
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* register ($8) then call overloaded setRegisters with the cause code to do the rest.
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*
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* @param cause The cause code (see Exceptions for a list). Should be address exception.
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* @param addr The address that caused the exception.
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*/
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public static void setRegisters(int cause, int addr) {
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Coprocessor0.updateRegister(Coprocessor0.VADDR,addr);
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setRegisters(cause);
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}
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} // Exceptions |